Please design one combinational circuit according to the following requirements:Input:The circuit takes in three 4-bit binary number independently.Output:The circuit outputs 0 in all cases expect when the 4 binary numbers are the last 4 digits of your student ID in order. These numbers are 8765For example, if your student ID is 123456789, then the circuit should output 0 unless “6”, “7”, “8”, “9” are given as the first, second, third and forth input number. If the order is changed, such as “7” “6” “8” “9”, the circuit should still output 0.

Design a circuit that either Adds or subtracts 3 from a 4-bit binary number N. Let the inputs N3, N2, N1, N0 represent N. The input K is a control signal. The circuit should have outputs M3, M2, M1, M0, which represent the 4-bit number M. When K=0, M=N+3. When K=1, M=N-3. Assume that the inputs for which M>11112 or M˂00002 will never occur and K is the most significant variable in the truth table. Implement your design with one 4-bit Binary Adder, one Quad 2-1 Multiplexer and NOT gates as required. a. Implement the function M3 with Two-Level NAND-NAND form. Assume that double-rail inputs are available from the source. b. Implement the functions M2 with a 5:32 decoder constructed from four 3:8 decoders with enable input E, one 2:4 decoder, and an external OR gate with a large fan-in. c. Realize the function M1 with a single 8-to-1 MUX. Take K, N3, N2 as selection inputs. d. Realize the function M0 with four three-state buffers, one 2:4 decoder, and other logic gates as required. Take N1, N0 as decoder inputs

Design procedure of a Combinational Circuit

Design a combinational circuit that can detect whether the 3-bit input binary number is even,odd, or prime number.(a) Find the number of inputs, and outputs.(b) Draw the truth table for the design problem(c) Implement the circuit using 3 × 8 Decoder.(d) Explain the design implementation in your own words. Lack of understanding of theproblem, and incorrect explanation will lead to 0 in the question.

A Combinational circuit is defined by the equations𝑌1 = 𝐴𝐵𝐶 + 𝐴′𝐵′𝐶𝑌2 = 𝐴′ + 𝐵′ + 𝐶 + 𝐷𝑌3 = 𝐴 + 𝐵 + 𝐶′𝐷 + 𝐴′𝐷𝑌4 = 𝐴𝐶𝐷 + 𝐴𝐶′𝐷′ + 𝐵𝐶′𝐷 + 𝐵𝐶𝐷′Realize the circuit which is implemented to get above fouroutputs Y1 to Y4 using a Decoder with (i) AND Gates, (ii)NAND Gates connected external to the decoder block withrequisite inputs and outputs

Consider the design of two logic circuits that both have four inputs: A, B, C and D; and one output: X.  Each circuit is implemented using 4-input AND gates (with negated inputs) and each circuit has an OR gate to generate the output.For circuit 1, X is defined to be 1 if and only if interpreting ABCD as an unsigned binary integer results in an even number. Note A is the most significant bit, then B, and so on.For circuit 2, X is defined to be 1 if and only if the total number of 1's among A, B, C and D is odd.Which of the following 4-input gates would be used in the implementation of both circuits?