Write a Verilog Code for 4 Bit Counter and the Counter should Reset at 1110

Sure, here is a simple Verilog code for a 4-bit counter that resets at the binary number 1110 (decimal 14).

module counter (
    input wire clk,
    input wire reset,
    output wire [3:0] out
);

reg [3:0] count;

always @(posedge clk or posedge reset) begin
    if (reset) begin
        count <= 4'b0000; // Reset the counter
    end else if (count == 4'b1110) begin
        count <= 4'b0000; // Reset the counter when it reaches 1110
    end else begin
        count <= count + 1; // Otherwise, increment the counter
    end
end

assign out = count;

endmodule

This code defines a 4-bit counter that increments on every rising edge of the clock signal. If the reset signal is high or the counter value reaches 1110, the counter is reset to 0000. The current counter value is always output on the out wire.